От: fpga journal update [news@fpgajournal.com]
Отправлено: 28 июня 2005 г. 22:53
Кому: Michael Dolinsky
Тема: FPGA Journal Update Vol VII No 13


a techfocus media publication :: June 28, 2005 :: volume VII, no. 13


FROM THE EDITOR

A year ago, in "DACs Dangerous Undertones" we reviewed the 41st Design Automation Conference (DAC) and took a close look at the difficult dilemma facing the electronic design automation (EDA) industry. This week, it's confession time. I skipped the 42nd DAC. Ditched it. Didn't go at all. "Ditchin' DAC" examines the trends over the 21 DACs I've attended, and speculates on where one of the electronics industry's favorite events may be headed.

Thanks for reading! If there's anything we can do to make our publications more useful to you, please let us know at: comments@fpgajournal.com

Kevin Morris – Editor
FPGA and Programmable Logic Journal


LATEST NEWS

June 28, 2005

LSI Logic Shatters Previous Density/Performance Boundaries With 90 Nanometer RapidChip Platform ASICs

LSI Logic Maximizes Nanometer SoC Integration With Enhanced Design Optimization Methodology

Altera, InterNiche and MorethanIP Announce Networking Reference Design for Nios II Processor

June 27, 2005

QuickLogic and Viosoft Partner to Provide Embedded Linux Toolkit for Mobile Platform Developers

C-Based Design and Synthesis Accelerates the Hardware Implementation of Military Radio; Military Communications Specialist Tadiran Selects Celoxica C-Synthesis Technology to Implement Complex Communications Signal Processing Algorithms

Magma Announces MUSIC Users Group Worldwide Meetings for 2005; Conferences Planned for India, United States and United Kingdom

HDL Works Introduces EASE 6.0

Exar Adds 16-bit SONET/SDH OC-48 Transceiver, Plus Unveils Its First OC-12/OC-3 Transceiver Solution

Stretch Partners With Vanguard Software Solutions to Deliver a Flexible and Cost-Effective Platform for H.264 Video Codec

Video, Imaging and Wireless Markets Targeted by Stretch Software-Configurable Processor

June 23, 2005

Altera Cyclone FPGAs and Nios II Embedded Processors Power World's Largest 32-bit Multiprocessor Display System


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CURRENT FEATURE ARTICLES

Ditchin' DAC
Analysis from an Absentee

What the Hell is ESL?
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Ditchin' DAC
Analysis from an Absentee

From before my kids were born until after they were grown and graduated, it was a June ritual. Twenty-one times in all, I made my annual pilgrimage to the Design Automation Conference (DAC), perhaps the most misunderstood massing of technology professionals our industry has to offer. DAC is “Burning Man” for the left brain – a mysteriously gravitational gathering that inexplicably pulls people from around the globe to one central location in non-consensual celebration of the unclear.

This year, the 42nd annual DAC was held in Anaheim California. It featured 240 exhibitors, 60 of whom were showing for the first time. Over 10,000 attendees were expected to attend the tradeshow, 57 technical sessions, 13 tutorials, four workshops, and 18 Pavilion presentations. As in every recent year, the 42nd DAC represented an industry at a crossroads, struggling to regain its identity. Would a new methodology, technology, or theme emerge that would re-vitalize the industry and resuscitate EDA from years of flatline financial performance? DAC promised to reveal the secrets.

I ditched.

Nobody can say for sure when DAC stopped making sense. In the early days, semiconductor companies were both the primary producers and the primary consumers of design automation software. Chip design teams wrote their own stuff and needed a place to get together to compare notes and share ideas. University students wanted jobs with semiconductor companies and needed a place to get published in order to prove that they were working on current, relevant technology instead of simply driving Mr. Kirchoff for another lap around the circuit board. University professors wanted tenure and needed papers to add their names to, adding to the perceived value of their academic stock before the faculty review board. [more]

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